New 64-Bit RISC Microprocessor From Toshiba Ideal for Digital Information Device Applications
Flexible MPU Incorporates an Ethernet MAC or NAND Flash Memory Interface
SAN JOSE, Calif., April 21 /PRNewswire/ -- Toshiba America Electronic Components, Inc. (TAEC)* today announced a new member of its TX49 family of MIPS-based reduced instruction set computer (RISC) microprocessors (MPUs). The new 64-bit MPU, designated TMPR4938XBG-300, is based on the Toshiba Corporation (Toshiba) TX49/H3 core and is fabricated with 0.13-micron complementary metal oxide semiconductor (CMOS) process technology. Operating at a maximum frequency of 300 megahertz (MHz) with low-power consumption and featuring built-in Ethernet Media Access Control (MAC) or a NAND Flash Memory interface, the new chip can accelerate processing in digital information devices and various network devices while accommodating smaller device sizes. With a fast 133MHz synchronous dynamic random access memory (SDRAM) controller on-chip, it has enhanced peripheral functionality and can support a variety of system configurations. In addition, devices requiring fast processing speed benefit from the large-capacity instruction cache and data cache. Sample shipments are scheduled to start in May 2003.
"Based on our overall strategy to target the digital information home electronics market, we have developed a new 64-bit RISC microprocessor, the TMPR4938XBG-300," said Shardul Kazi, vice president of the TX-RISC Business Unit at TAEC. "This single-chip solution uses our mature 0.13-micron miniaturized process technology and integrates our proven 64-bit RISC core, TX49/H3, along with a large-capacity, on-chip cache memory and enhanced peripheral functionality. It enables our customers to accelerate processing in the digital information and networking market segments with smaller device size, reduced power and reduced system cost."
"With the progression of Moore's Law, high-performance microprocessors offer semiconductor companies the ability to deliver more features at lower system costs due to their ability to integrate features -- such as Ethernet controller functions -- as well as integrate NAND flash memory interface into the SOC with the host CPU," said Jack Browne, vice president of worldwide sales for MIPS Technologies. "Toshiba has long been recognized within the MIPS ecosystem for their innovative MIPS-based solutions, and the latest TX49 design is another example of their leadership. We applaud Toshiba for their efforts that have brought this unique product to market."
Key Features
Key features of the microprocessor are as follows:
* Integrates the newest 64-bit original processor, TX49/H3 core, that
Toshiba originally developed based on the MIPS Group (USA) RISC
architecture.
* Achieves an operating frequency of 300MHz.
* Incorporates a four-way set-associative large-capacity cache memory
with 32K-bytes instruction cache and 32K-bytes data cache. This makes
it possible to improve the cache hit ratio, accelerate device
processing, and work towards improving performance.
* Integrates an Ethernet MAC or a NAND Flash Memory interface that makes
it possible to realize on a single chip circuits that had to be
configured across several chips in the past. This in turn makes it
possible to reduce product cost and product size as well.
* Contains an on-chip SDRAM Controller, universal asynchronous
receiver-transmitter (UART), timer, and interrupt controller.
* Has an EJTAG debugging support unit that makes it possible to set
various breakpoints and perform real-time analysis.
* Toshiba will provide an evaluation reference board to customers for
this new product.
* For the operating system, MontaVista(TM) Linux (R) of MontaVista Japan
(KK) and VxWorks(R) of Wind River (KK) are supported.
Development Background
In recent years, development of digital information home electronics products that can connect to Ethernet networks is thriving and a number of products are already being sold on the market. These products employ a two- chip solution consisting of an Ethernet Controller and a CPU. However, it is preferable to build the Ethernet Controller into the CPU to increase performance and reduce cost. Also, such products have large program and data capacity, which causes the cost to increase when conventional NOR type Flash memory is used.
In response to these needs, Toshiba has built into its TX49/H3 core large- capacity on-chip cache memory and on-chip peripheral circuits, making it possible to bring to the market products with accelerated processing speed that are smaller and lower cost.
Pricing and Availability
Samples of TMPR4938XBG-300 are scheduled to be available in May 2003 at $35.00 per piece in 10,000-piece quantities. Mass production is slated to start in June 2003 at an initial run rate of 100,000 units per month.
Technical Specification Summary
Part Number TMPR4938XBG-300
Process 0.13-micron process
Operating Power Voltage 1.5 Volts (V) internal power, 3.3V external
power
Maximum Operating Frequency 300MHz internal, 133MHz external
On-Chip Cache Memory Instruction Cache: 32K-bytes, 4-way
associative
Data Cache: 32K-bytes, 4-way associative
Memory Management Unit 48-double-entry
Floating Point Unit On-chip single- or double-precision floating
point operation
On-chip Peripheral
Functions 10/100 Base-T Ethernet MAC (2 channels)
NAND Flash Memory interface
Peripheral Component Interconnect controller
Direct Memory Access controller (8 channels)
UART (2 channels)
32-bit timer (3 channels)
Interrupt controller (6 external sources)
Memory controller (supports SDRAM at 133MHz,
static RAM, read only memory, NOR-type
Flash memory, input/output)
AC-Link (AC97 Interface)
Package Plastic ball grid array 484-pin
(35mm x 35mm, 2.3mm thick with 64-pin
thermal ball)
*About TAEC
Combining quality and flexibility with design engineering expertise, TAEC brings a breadth of advanced, next-generation technologies to its customers. This broad offering includes semiconductors, flash memory-based storage solutions, optical communication devices, displays and rechargeable batteries for the computing, wireless, networking, automotive and digital consumer markets.
TAEC is an independent operating company owned by Toshiba America, Inc., a subsidiary of Toshiba, the third largest semiconductor company worldwide in terms of global sales for the year 2002 according to Gartner/Dataquest's Worldwide Semiconductor Market Share Ranking. Toshiba is a world leader in high-technology products with more than 300 major subsidiaries and affiliates worldwide. For additional company and product information, please visit TAEC's website at chips.toshiba.com. For technical inquiries, please e-mail Tech.Questions@taec.toshiba.com.
All trademarks and registered trademarks are the property of their respective owners.
CONTACT: Deborah Chalmers of Toshiba America Electronic Components,
Inc., +1-408-526-2454, deborah.chalmers@taec.toshiba.com, or Judy Kahn,
+1-650-948-8881, judith.kahn@attbi.com, for Toshiba America Electronic
Components, Inc.
Web site: http://www.chips.toshiba.com/
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